Memory systems are used extensively today in processing systems to store data needed by various processing entities. A memory system generally includes a memory controller that manages access to the memory. The memory is typically configured in a matrix structure formed by rows and columns of memory cells, with each memory cell being capable of storing a bit of data. A block of memory cells may be accessed by a processing entity, or other source, by providing the appropriate address to the memory controller. The address from the processing entity may be sent to the memory controller over a bus with the row address occupying the higher-order bits and the starting column address occupying the lower-order bits. The memory controller uses a multiplexing scheme to send the row address to the memory followed by the starting column address.
When a processing entity requires access to a block of memory, it sends a read or write command to the memory controller. Each read and write command includes an address. The manner in which the memory controller executes each command depends on whether the processing entity is attempting to access an open page in the memory. A “page” is normally associated with a row of memory, and an “open page” means that the memory is pointing to a row of memory and requires only the starting column address and a column access strobe (CAS) to access the block of memory. To access an unopened page of memory, the memory controller must present the row address and a row access strobe (RAS) to the memory to move the pointer before presenting the starting column address and the CAS to the memory.
Various memories are used today in memory systems. A Synchronous Dynamic Random Access Memory (SDRAM) is just one example. When a processing entity is writing to a SDRAM, or other memory device, data is transmitted over a data bus between the memory controller and the memory. A data mask may be used by the memory controller to mask data on the data bus. When the data mask is deasserted, the data on the data bus will be written to the memory. When the data mask is asserted, the data on the data bus will be ignored, and the write operation will not be performed.
The data mask is only used during write operations. When a processing entity is not writing to the SDRAM, or other memory device, the memory controller tri-states the data mask. Thus, there exists an opportunity to use the data mask for other purposes when the processing entity is not performing a write operation. By utilizing the data mask in this way, additional communications can occur between the memory controller and the memory without increasing the number of pins on the memory device.